SerDes System Validation Engineer
Core
Own SerDes system bring-up, validation, and debug in system environments to ensure robustness and margins for Apple's high-speed serial link products.
Role type
System Validation Engineer (SerDes/Analog-Mixed Signal)
Builds
High-speed serial link IPs (PCIe, USB, DP, MPHY) for Apple SoCs
Domain
Consumer Electronics / High-Speed Analog-Mixed Signal
Required skills
SerDes system bring-up, mixed-signal verification, DFT definition, high-speed serial link protocols (PCIe, USB, DP, MPHY), Tx/Rx equalization (CTLE, DFE, de-emphasis), CDR architectures, analog mixed-signal circuit design, lab and production testing, data analysis, scripting and automation
Preferred skills
Analog mixed-signal circuit block design (Bandgap, LDO, amplifiers, ADCs, DACs), digitally assisted analog design, firmware-assisted mixed-signal IP development, AI/ML application for silicon performance
Technologies
PCIe, USB, DP, MPHY, CTLE, DFE, CDR, Python (implied by scripting)
Responsibilities
Verify and qualify all SerDes operations in system environment; analyze robustness and margins; define DFT needs to enhance testability; perform mixed-signal verification to assure pre-silicon test coverage; drive lab and production testing and debug.
Seniority
Mid-Senior, hands-on IC validation