SoC Hard IP Characterization Product Engineer
Core
Develop system-level test programs for debug, characterization, qualification, and production of System-on-Chip (SoC) devices, focusing on High Speed IO PHYs, PLLs, Sensors, and Custom HardIPs.
Role type
SoC Hard IP Characterization Product Engineer
Builds
Next-generation, high-performance, power-efficient processor and system-on-chip (SoC) devices
Domain
Semiconductor / Silicon Technologies
Required skills
Statistical data analysis, ATE-Bench correlation, Failure analysis, Yield analysis, Cross-functional collaboration, Test plan definition
Preferred skills
High-Speed IO PHYs characterization, Mixed-signal IP knowledge, ATE production testing, Scripting (Python, PERL), Design for Test concepts
Technologies
SERDES, PLLs, Sensors, ATE-Bench, Python, PERL
Responsibilities
Characterize parametric performance of High Speed IO PHYs, PLLs, Sensors and other Custom HardIPs; Define characterization plans and sign off on silicon characterization activities; Work with DFT and design teams to evaluate IP testability; Perform failure analysis to root-cause issues; Support productization of next generation SoCs; Complete yield and correlation analysis for test insertions
Seniority
Mid-level, hands-on IC
