RF/Analog IC Layout Engineer (m/f/d)
Core
Designing RF/Analog IC layouts for integrated cellular RF transceivers in RF CMOS technologies.
Role type
Senior IC layout engineer (RF/Analog)
Builds
Integrated cellular RF transceivers
Domain
Consumer electronics / Wireless communications
Required skills
Floor-planning, transistor-level layout, full verification flow, packaging simulation, routing optimization, signal path matching, DRC/LVS/Antenna-DRC interpretation, Cadence tools, deep sub-micron CMOS/FinFET knowledge, RF building blocks (LNAs, mixers, VCOs, DCOs, PAs)
Preferred skills
Device matching techniques, parasitics reduction, RF shielding, high-frequency routing, RC delay analysis, electro-migration analysis, coupling effects analysis
Technologies
Cadence, CALIBRE DRC, CALIBRE LVS, CALIBRE ANTENNA-DRC
Responsibilities
Collaborate on floor-planning with RF IC design and system teams; perform block-level and top-level layout; manage top-level layout integration and verification; simulate RF de-sense and coupling with packaging experts; conduct layout reviews for routing, signal path, IQ matching, and coupling.
Seniority
Senior, hands-on IC
