RFIC Layout Engineer

Sunnyvale, United States of America💼 Full-time🗓 2026-09-11 → 2026-09-28

Core

Create transistor-level layouts for RF and analog circuit blocks within wireless System-on-Chip (SoC) designs, ensuring high performance and energy efficiency.

Role type

Senior IC RF layout engineer

Builds

Wireless silicon products (SoCs) for consumer electronics

Domain

Semiconductor / RFIC / Analog IC

Required skills

Transistor-level layout, LNA/mixer/PLL/PA/ADC/DAC design, DRC/LVS/DFM verification, floorplanning, power/gnd routing, electromigration analysis, signal coupling mitigation, device matching, FinFet technology, Cadence tools, CALIBRE DRC/ERC/LVS interpretation

Preferred skills

Deep sub-micron CMOS (16nm and lower), guard rings/DNW/PN junctions, LOD/WPE process effects, Perl/SKILL scripting, top-level integration leadership

Technologies

Cadence Virtuoso, CALIBRE, FinFet, 16nm and lower nodes

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About Apple

Computers and Electronics Manufacturing194620Cupertino, California, USFounded 1976

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