Physical Design Sign-off Engineer
Core
Develop full-stack web applications, dashboards, and data visualization tools for the Signoff infrastructure used by Apple SOC design groups to validate chip designs against manufacturing, timing, and power criteria.
Role type
Senior IC full-stack software engineer (Signoff infrastructure)
Builds
Signoff dashboards, CAD flow metrics collection, data visualization tools, and AI/RAG features
Domain
Semiconductor hardware design (chip design) + Web development
Deliverable
product features
Required skills
Python, JavaScript/TypeScript, SQL, full-stack web development, backend services/APIs, interactive frontend dashboards, RAG integration, AI/LLM integration
Preferred skills
Perl, Tcl, Cadence Innovus, Synopsys ICC2/Fusion Compiler/PrimeTime/Tempus, timing closure, signal integrity, low-power design, clock-tree construction, PPA optimization, Kubernetes, Prometheus, Grafana, test-driven development
Technologies
Python, JavaScript, TypeScript, SQL, Cadence Innovus, Synopsys ICC2, Synopsys Fusion Compiler, Synopsys PrimeTime, Synopsys Tempus, Kubernetes, Prometheus, Grafana
Responsibilities
Develop and maintain backend services and APIs for Signoff infrastructure
Seniority
Senior, hands-on IC
