Staff/Senior Engineer- Mask Design (Analog Layout)
Core
Analog Layout Design Engineer responsible for floorplanning and layout of analog circuits (charge pumps, comparators, amplifiers, bandgaps, linear regulators) from block level to full chip for AI and automotive power products.
Role type
Senior IC analog layout engineer with team leadership
Builds
Power ICs (Controllers, Drivers, DC-DC converters) for AI and automotive applications
Domain
Semiconductor / Power Electronics / Analog IC Design
Required skills
Analog layout design (block to full chip), Floor planning, Analog layout matching, EM and reliability design, Die-level integration (digital, analog, PowerFET, ESD, I/O, PAD), DRC/LVS/Package flows, Mentoring engineers
Preferred skills
BCD node IC layout, Package/substrate design (Flip chip, BGA, wire bond), Scripting (Python, Perl, TCL), Advanced IC CAD tools (Virtuoso XL, Calibre)
Technologies
Virtuoso XL, Calibre DRC, LVS, PEX, PVS, EM, IR, R3D
Responsibilities
Drive design innovation and best practices for analog circuits, Manage a small group of engineers and mentor new graduates, Collaborate with circuit and layout teams to minimize rework, Ensure portability of IP across designs following methodology guidelines
Seniority
Senior, hands-on IC with team leadership