Physical Design Engineer
Core
Implement ASIC physical design flow for digital islands within analog chips, focusing on floorplanning, placement, clock tree synthesis, routing, and power integrity analysis.
Role type
Senior IC physical design engineer (mixed-signal/ASIC)
Builds
ASIC chips with embedded digital implementation for automotive, industrial, infrastructure, and IoT applications
Domain
Semiconductor (Analog/Mixed-Signal ASIC design)
Required skills
ASIC physical design flow, floorplanning, placement optimization, clock tree synthesis (CTS), routing, physical verification, power integrity analysis (IR drop, electromigration)
Preferred skills
Analog layout experience
Technologies
Standard ASIC design tools (implied by flow steps)
Responsibilities
Implement ASIC physical design flow steps (floorplanning, placement, CTS, routing, verification), optimize designs for performance/reliability/manufacturability, perform chip-level power integrity analysis, collaborate with analog designers and verification engineers
Seniority
Senior, hands-on IC