Analog Layout Engineer
Core
Design the physical layout of analog circuits, ensuring proper component placement and routing for optimal performance while addressing parasitic effects, signal integrity, and power distribution.
Role type
Senior IC analog layout engineer
Builds
Analog circuit layouts for production
Domain
Semiconductor / Analog IC design
Required skills
Analog layout design, analog circuit design principles, layout tools and software, parasitic extraction and mitigation, signal integrity analysis, power distribution optimization, design for manufacturability (DFM), design for testability (DFT)
Preferred skills
None stated
Technologies
None explicitly named (e.g., Cadence Virtuoso, Synopsys IC Compiler)
Responsibilities
Lead design reviews and provide constructive feedback to improve layout quality and efficiency, Mentor junior engineers to develop their skills and understanding of analog layout principles, Coordinate with manufacturing and testing teams to ensure smooth transition from design to production, Drive continuous improvement initiatives to enhance layout methodologies and tools, Engage with multiple teams and contribute on key decisions, Provide solutions to problems for their immediate team and across multiple teams
Seniority
Senior, hands-on IC with team leadership