Process Integration Intern, ULP CMOS Technology Development (Summer 2027)
Core
Support process integration of advanced CMOS devices on FinFET and FDSOI technologies to improve device performance, yield, and electrical parameters.
Role type
Intern, process integration engineer (semiconductor)
Builds
Advanced CMOS technology nodes (FinFET, FDSOI)
Domain
Semiconductor manufacturing / Process Integration
Required skills
DOE, FMEA, data analysis, statistical methods, semiconductor processing knowledge, device physics, process integration, electrical characterization
Preferred skills
AI tools usage, project management, leadership experience, data analysis experience
Technologies
FinFET, FDSOI, DOE, FMEA
Responsibilities
Use data systems and structured problem-solving methodologies to identify issues and support continuous improvement plans; Collaborate with device, process module, and characterization teams to support development work for new technology features; Assist with new project introduction and characterization by prioritizing work based on business needs and coordinating tasks with the extended module team.
Seniority
Intern
