Semiconductor Packaging Integration Research Manager
Core
Leading advanced packaging integration research to enable next-generation heterogeneous semiconductor technology and systems.
Role type
Senior IC research manager (semiconductor packaging integration)
Builds
Early-stage integration strategies, feasibility demonstrations, prototypes, and technology readiness assessments for advanced packaging solutions.
Domain
Semiconductor manufacturing, advanced packaging, heterogeneous integration
Required skills
Advanced packaging integration research leadership, heterogeneous integration strategy, chiplet architecture expertise, technology roadmap definition, multidisciplinary team management, system-level trade-off analysis, research-to-development transfer, cross-functional collaboration, experimental validation, failure analysis, manufacturability assessment
Preferred skills
Innovation in 2.5D/3DIC and hybrid bonding, thermal-mechanical modeling, reliability physics, high-speed I/O and power integrity, patent/publication record, multi-organization ecosystem collaboration, AI/HPC/custom silicon packaging knowledge
Technologies
2.5D/3DIC, hybrid bonding, chiplets, interposers, wafer-level packaging, die-to-die interconnects, substrates, assembly materials, thermal-mechanical modeling tools
Responsibilities
Lead packaging integration research programs for heterogeneous integration and emerging interconnects; Define integration research strategy and technical roadmaps; Manage multidisciplinary teams of researchers and engineers; Translate system requirements into package integration solutions; Partner with design, process, reliability, and manufacturing teams; Drive feasibility studies, prototyping, and technology readiness assessments; Guide research-to-development transfer and qualification; Communicate technical progress and strategic recommendations to senior leadership
Seniority
Senior, hands-on IC with strategic oversight