PRINCIPAL ENGINEER – FE OCT CPEE HVM DRY ETCH
Core
Leading plasma process optimization, hardware qualification, and yield improvement for Dry Etch modules in semiconductor manufacturing.
Role type
Principal Engineer, Semiconductor Process & Equipment (Dry Etch)
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor manufacturing, Dry Etch, Plasma Physics
Required skills
Plasma process optimization, Dry Etch equipment management, Failure analysis (FMEA, 8D, SPC), Hardware CIP roadmap development, Cross-functional collaboration, Safety and sustainability compliance, Data analysis (FDC, SPC), Project implementation, Root cause analysis, Process window establishment
Preferred skills
AI tool integration, IoT/FDC sensor setup, Energy optimization, Waste reduction strategies
Technologies
LAM Kiyo, Flex, Vantex, Versys, TEL Tactras, RK, AMAT Sym3, Centura, RF/match networks, Gas delivery systems, ESC, Endpoint detection, Plasma sources, IoT/FDC sensors
Responsibilities
Strategize and lead productivity, yield, quality, and cost improvement engagements via plasma process optimization and hardware qualification. Collaborate with cross-functional teams to drive breakthroughs in defect reduction, particle/residue control, and chamber-matching. Develop the process and hardware CIP roadmap for Dry Etch modules. Drive process & hardware improvement with emphasis on safety, defect reduction, and sustainability. Partner with suppliers to establish equipment start-up acceptance criteria and tool service requirements. Improve tool efficiency, WPD, and utilization through benchmarking and productivity programs. Set up IoT/FDC sensors and advanced chamber telemetry for defense-line strengthening. Establish and improve process windows and recipe robustness. Enable new solutions for energy savings and waste reduction. Integrate AI-assisted tools into daily work to improve efficiency and quality.
Seniority
Principal, hands-on IC with strategic leadership