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Engineer, HIG HBM LAYOUT

Hyderabad - Phoenix Aquila, India💼 Full-time🗓 2026-09-30 → 2026-10-01

Core

Design and development of critical analog, mixed-signal, custom digital blocks, and full chip level integration for High Bandwidth Memory (HBM) solutions.

Role type

Senior IC layout engineer (analog/mixed-signal)

Builds

Custom analog and mixed-signal blocks (Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier) for HBM chips

Domain

Semiconductor manufacturing, VLSI, High Bandwidth Memory (HBM)

Required skills

Analog layout design, Mixed-signal layout, Custom digital block layout, LVS/DRC/Antenna verification, Area/time estimation, Scheduling, Team leadership, Physical verification, Tape-out support

Preferred skills

Test Vehicle build experience, Multiple tape-out support experience

Technologies

Cadence VLE/VXL, Mentor Graphic Calibre

Responsibilities

Design and develop critical analog, mixed-signal, custom digital block, and full chip level integration; Perform layout verification like LVS/DRC/Antenna, quality check and support documentation; Guide peer team-members in execution of Sub block-level layouts & review critical items; Coordinate with peer groups across worldwide locations on multiple projects

Seniority

Mid-level, hands-on IC

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