Wireline Serdes Analog Mixed Signal Design Engineer
Core
Design and verification of high-speed analog and mixed signal circuits for next-generation wireline and optical transceivers serving data centers, cloud infrastructure, and AI/HPC.
Role type
Senior IC analog mixed-signal design engineer
Builds
High-speed SerDes topologies, drivers, front-end circuits, samplers, comparators, ADCs, DACs, PLLs, and clock distribution for data center and AI/HPC transceivers
Domain
Semiconductor / High-speed analog and mixed-signal design
Required skills
Analog circuit design, Mixed-signal design, High-speed SerDes topology evaluation, Circuit verification, Silicon debugging, Cross-functional collaboration
Preferred skills
DSP/system design, Data center transceiver experience, AI/HPC domain knowledge
Technologies
SerDes, ADCs, DACs, PLLs, Clock distribution
Responsibilities
Architecture study and evaluation of advanced high-speed SerDes topologies, Design and verification of high-speed analog and mixed signal circuits, Collaborate with cross functional teams to improve system performance and optimize designs, Evaluate, measure, and debug silicon until it reaches high volume production
Seniority
Senior, hands-on IC