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Silicon Photonics PIC Layout Engineer

USA-California-San Jose-1320 Ridder Park Drive💼 Full-time💰 $101,000–$101,000🗓 2026-09-30 → 2026-10-01

Core

Design and implement photonic integrated circuit (PIC) layouts using script-based tools to ensure performance and specification compliance.

Role type

IC Layout Engineer (Silicon Photonics)

Builds

Photonic integrated circuits (PICs)

Domain

Semiconductor / Silicon Photonics

Required skills

Photonic IC layout, EDA tools, Cadence, LVS, DRC, Script-based layout

Preferred skills

Script-based layout

Responsibilities

Design and implement photonic integrated circuit (PIC) layouts, Develop and utilize a script-based layout tool, Perform layout vs. schematic (LVS) and design rule checking (DRC), Contribute to the development and improvement of layout methodologies and flows

Seniority

Mid-Senior, hands-on IC

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