DRAM Technology & Design at Micron Jobs
About Micron
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. The Global Procurement (GP) team is an integral engine to Micron’s growth, delivering best‑in‑class total cost and supply chain resiliency through cutting‑edge predictive capabilities, risk analysis, and a focus on sustainability and diversity. Our business goals are directly tied to the value we
66 Open Roles
66 open roles · apply directly
- New College Grad - AI Infrastructure & HBM Architecture Engineer · Richardson, TX
- Principal Foundry Interface Design Engineer, HBM · Folsom, CA, US
- Intern - AI Hardware and Memory Systems · Folsom, CA
- Sr Design Verification Engineer, DRAM · Boise, ID - Main Site
- Principal Signal Integrity Engineer · Boise, ID - Main Site, US
- DMTS · Boise, Idaho, United States of America
- New College Grad - HBM Digital Verification Engineer · Jalisco, Mexico
- Intern - DRAM Test Structure Design and Layout Engineering · Boise, ID - Main Site
- Intern - DRAM Design Rules · Boise, ID - Main Site
- STAFF ENGINEER, DDEG Design Methodology · Hyderabad - Phoenix Aquila, India
- Staff Design Engineer, HBM Architecture · Richardson, Texas, United States of America
- Intern - CDBU Marketing · San Jose, California, United States of America
- Working Student in Software Quality Assurance (m/f/d) · Munich, Germany
- PRINCIPAL ENGINEER, DDEG DESIGN METHOD · Hyderabad, Telangana, India
- MTS - DPG Layout · Hyderabad - Phoenix Aquila, India
- DRAM Memory Design Engineer - Principal | MTS | SMTS · Boise, ID - Main Site
- Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal · Boise, ID - Main Site
- Senior DRAM Systems Architecture · San Jose, CA, US
- Design Layout Engineer · Tlaquepaque, Jalisco, Mexico
- Intern - DRAM Design Engineer · Boise, ID - Main Site
- Design Architecture, Principal Engineer · Hsinchu, Taiwan
- Senior Circuit Design Engineer, DRAM · Boise, ID - Main Site
- Sr HBM Design Architect, PhD NCG · Richardson, TX, US
- MTS, AI Optimized Memory Digital Design Engineer · Folsom, CA, US
- Staff Engineer, CE CAD · Richardson, Texas, United States of America
- LPDRAM enhances embedded programming and AI development · Hashimoto, Japan
- DRAM Design Working Student in Munich (m/f/d) · Munich (MDC), Germany
- New College Grad - Semiconductor Design Engineer · Boise, ID - Main Site
- Sr Design Engineer, DEG Design Method · Boise, ID - Main Site
- Semiconductor Principal Design Engineer · Tokyo, Japan
- Principal Design Engineer, DRAM · Boise, ID - Main Site
- Principal Analog Design Engineer · Boise, ID - Main Site
- Principal Technical Product Manager – CDBU DRAM · Boise, ID - Main Site, US
- Staff Design Engineer, DRAM · Boise, ID - Main Site
- Member of Technical Staff, SoC Power and Physical Architect, Next-generation HBM Architecture · Folsom, CA
- Senior Member of Technical Staff / Member of Technical Staff, DRAM Design Engineer, Next-generation HBM Architecture · Richardson, TX
- Sr. Principal/SMTS, IO/Clock Design Engineering · Boise, ID - Main Site
- Principal/MTS, Analog Design Engineering · Boise, ID - Main Site
- New College Grad - DRAM Design Engineer · Boise, ID - Main Site
- Principal Layout Designer, Next-generation HBM Architecture · Richardson, TX, US
- Principal/MTS, IO Design Engineering · Boise, ID - Main Site
- Principal Design Engineer · San Jose, CA
- Product Development Engineer · Boise, ID - Main Site
- RDA & Metrology Data Platform Engineer · Taoyuan City, Taoyuan City, Taiwan
- Staff Design Engineer/Architect, HBM · Richardson, TX
- Staff Memory Design Engineer, Pathfinding · 3 Locations
- Staff Digital Design Engineer, HBM · Richardson, TX
- New College Grad · Richardson, TX
- Engineer- DRAM, Advanced DRAM and EM Device/Cell Technology · Boise, ID - Main Site
- Principal CAD Engineer, Central Engineering · Richardson, TX
- Senior DRAM Design Engineer · Boise, ID - Main Site
- RAM RDA Applications Engineer · Taichung City, Taichung City, Taiwan
- Senior Business Planning Analyst · San Jose, CA
- Engineer, Design · Avezzano (AQ), Italy
- MTS ASIC Architect · Bengaluru, India
- LPDDR Product Architect · San Jose, CA
- Principal HBM Design Architect · Richardson, TX
- Staff Mixed-Signal Design Engineer, Pathfinding · Folsom, CA, US
- DRAM Design Technology Layout Engineer · Jalisco, Mexico
- Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect · Folsom, CA, US
- LPDRAM Product Engineer · Kanagawa, Japan
- Staff HBM Design Architect - DFT · Richardson, TX, US
- Design Validation Product Engineer, DEG Technology · Boise, ID - Main Site
- Senior Engineer/Principal Engineer, CPIE RAM Detection Strategy · Boise, Idaho, United States of America
- DMTS, Systems Architect · San Jose, CA, US
- Staff HBM Design Architect · Richardson, TX, US
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