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Principal Design Verification Engineer

United States, Washington, Redmond💼 Full-time🗓 2026-09-11 → 2026-09-29

Core

Creation of complex verification environments and tests for pre-silicon functional verification at block, chip, and system levels, including reference modeling and post-silicon validation.

Role type

Principal Design Verification Engineer

Builds

Verification environments, test plans, scoreboards, sequences, constraints, assertions, and functional coverage for IP/SS/SOC level verification.

Domain

Semiconductor hardware design and verification

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