CPU Debug and Power Management Verification Engineer
Core
Design Verification Engineer for auxiliary features of a high-performance ARM-based CPU, focusing on Power Management, Clock Control, Debug Infrastructure, Resets, and Special-Purpose Registers.
Role type
Senior IC design verification engineer (CPU silicon)
Builds
Robust, low-power, high-performance CPU designs for Apple hardware products
Domain
Semiconductor / CPU Design Verification
Required skills
SystemVerilog, SVA, C++, Assembly, Perl, Python, UVM, random constraint verification, functional coverage analysis, test plan development, silicon bring-up debugging, waveform/trace tool analysis
Preferred skills
Processor architecture knowledge, power management architecture, system fabric protocols (AXI), formal verification, hardware trace, object-oriented programming, UPF/low-power simulation
Technologies
SystemVerilog, SVA, UVM, Perl, Python, C++, Assembly, AXI, FPGA, Emulation, Silicon
Responsibilities
Collaborate with architecture and RTL designers to verify CPU Power Management, clock control, and debug logic; Develop and execute test plans and schedules; Write and debug tests in simulation, emulation, and FPGA environments; Build and maintain verification infrastructure including checkers, transactors, and coverage monitors; Analyze functional coverage to ensure test plan completeness; Identify, root-cause, and document design issues; Support SoC-level debug for clock and power integration issues; Contribute to post-silicon debug using waveform and trace tools
Seniority
Senior, hands-on IC
