Wireless SOC Verification Engineer
Core
Pre-silicon RTL verification of complex Wireless SOCs, including block and top-level verification, using UVM methodologies and coverage-driven testing.
Role type
Senior IC Design Verification Engineer (Wireless SOC)
Builds
Wireless/Bluetooth chips for iPhones and networking devices
Domain
Semiconductor / Wireless Communications / ASIC Design
Required skills
SystemVerilog, UVM methodology, ASIC full cycle verification, coverage-driven testing, multi-chip SOC debug, high-speed layered protocols, low-power design (UPF), PCIe, CPU, multi-processor systems, DMA, DDR, Memory Controller, USB, PLL, Secured Boot
Preferred skills
Large SOC taping out with embedded cores, Formal Verification, Bus Fabric/NOC/AXI/NOH verification, HW/FW interaction verification
Technologies
UVM, SystemVerilog, UPF, PCIe, DDR, USB, AXI, NOC, Formal Verification tools
Responsibilities
Create coverage driven verification plans from specifications; Architect UVM based highly reusable test benches; Integrate complex multi-instance VIPs and test suites to SOC level; Achieve targeted coverage by collaborating with design, architecture, SW, FW and external IP teams; Deliver on Power Management designs using low-power methodologies; Work with DV methodology architects to improve verification metrics.
Seniority
Senior, hands-on IC
