Wireless Design Verification Engineer
Core
Pre-silicon RTL verification of wireless MAC and its interfaces within a wireless SoC to ensure design quality for hundreds of millions of customers.
Role type
Senior IC design verification engineer (wireless SoC)
Builds
Wireless silicon products (SoC) for consumer devices
Domain
Semiconductor / Wireless Communications
Deliverable
production ML models
Required skills
UVM, SystemVerilog, constrained random testing, coverage modeling, Python scripting, AI/ML for design analysis, Palladium/FPGA validation
Preferred skills
Wireless protocol knowledge (Bluetooth, UWB, WLAN, Zigbee), ASIC verification flows, MAC/PHY/DMA verification experience
Technologies
UVM, SystemVerilog, Palladium, FPGA, Python, Perl
Responsibilities
Create verification plans and coverage models; build reusable block-level test benches; execute directed and constrained random tests; debug failures and manage bug tracking; analyze coverage and add test cases; support validation using Palladium/FPGA; improve DV methodology and flow.
Seniority
Senior, hands-on IC
