RTL Design Engineer
Core
Designing and verifying sophisticated digital and mixed-signal circuits for Apple products.
Role type
Senior RTL Design Engineer (mixed-signal)
Builds
High-performance mixed-signal and analog IPs integrated into high-speed digital circuits
Domain
Semiconductor / Mixed-signal silicon design
Deliverable
production ML models | product features
Required skills
RTL design, Verilog, SystemVerilog, mixed-signal concepts, analog circuit behavioral modeling, synthesis, static timing, DFT, low power design methodologies, scripting (Perl, Python, JSON), GenAI tools for code generation
Preferred skills
Micro-architecture, design verification (assertions, checkers), lab bring-up, digital signal processing
Technologies
Verilog simulators, linters, CDC, RDC, LEQ, UPF, GenAI tools
Responsibilities
Specify and micro-architect digital blocks in mixed-signal circuits, write RTL code, participate in design verification and bring-up, write test scripts and analyze lab data
Seniority
Senior, hands-on IC