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CPU Physical Design Methodology and Optimization Engineer

Santa Clara, United States of America💼 Full-time🗓 2025-11-04 → 2026-09-28

Core

Engineer new flows and algorithms to improve Power, Performance, and Area (PPA) for industry-leading CPU designs, applying machine learning techniques in silicon design.

Role type

Senior IC physical design methodology and optimization engineer

Builds

CPU physical design flows and optimization algorithms

Domain

Semiconductor / CPU design / Physical Design

Deliverable

production ML models

Required skills

Digital circuit design, timing analysis, power analysis, logic design, algorithm development, scripting (TCL/Perl)

Preferred skills

High-performance physical design techniques, PnR and STA tool usage, Python programming, deep sub-micron technology challenges

Technologies

Python, TCL, Perl, Synthesis tools, PnR tools, STA tools

Responsibilities

Engineer new flows/algorithms to improve PPA, Perform detailed analysis across partitions to identify optimization opportunities, Develop new PD focused flows to improve CPU performance and efficiency, Collaborate cross-functionally with STA, library, tech, and post silicon teams

Seniority

Senior, hands-on IC

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