Graphics FE Implementation Engineer
Core
Drive block-level synthesis, analysis, and optimization of GPU IP to meet timing, power, and area targets for Apple Silicon.
Role type
Senior IC graphics implementation engineer (ASIC flow)
Builds
World-class GPU IP for Apple Silicon
Domain
Semiconductor hardware design (ASIC/GPU)
Required skills
RTL design improvement, synthesis optimization, netlist validation, ECO implementation, multi-clock/power domain management, scripting (Python/Tcl/Perl)
Preferred skills
Physical design collaboration, architectural critical path analysis, DFT insertion, simulation debugging, GPU/CPU architecture experience
Technologies
RTL, Synthesis, STA, DFT, UPF, Python, Tcl, Perl
Responsibilities
Drive block-level synthesis and optimizations; Debug complex logic equivalence issues and netlist checks; Implement ECOs for functionality and timing; Collaborate with RTL, PD, and STA teams to achieve first silicon.
Seniority
Senior, hands-on IC
