SerDes Circuit Design Engineer
Core
Designing high-performance Analog Mixed-Signal (AMS) circuits for high-speed SerDes PHYs to deliver IP for Apple's system-on-chip (SOC).
Role type
Senior IC Analog Mixed-Signal Circuit Design Engineer
Builds
High-speed wireline transceiver IPs (Rx, CDR, Tx, bias generators, clock generation, phase interpolators, DLL, VCO, LDO) for Apple SOC
Domain
Semiconductor / High-speed SerDes / Analog Mixed-Signal
Required skills
Analog mixed-signal circuit design, high-speed serial link design, circuit topology evaluation, block-level specification, mixed-signal implementation, behavioral modeling, SOC IP integration, cross-functional collaboration, technical leadership, FinFet technology, CMOS IC development, lab testing and debugging, timing closure, IP delivery quality checks
Preferred skills
Digitally assisted analog design, Tx/Rx equalization techniques, CDR architectures, high-speed digital circuit design, scripting and automation, high-speed SerDes protocols knowledge
Technologies
SystemVerilog, Matlab, Python, VerilogAMS, Nanotime, Primetime, PCIe, USB, DP, MPHY
Responsibilities
Develop high-performance AMS circuits for SerDes PHY including evaluation of circuit topologies; Lead discussions with cross-functional teams to create block-level specifications and drive mixed-signal implementations; Work with SOC teams to deliver IP views meeting quality standards; Interact with peers and management to communicate progress and drive new implementations; Guide junior engineers in developing circuit components for high-speed IO; Drive lab testing, debug, and data analysis for AMS IC development from definition to production.
Seniority
Senior, hands-on IC with technical leadership