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Circuit Design Engineer - Library

Santa Clara, United States of America💼 Full-time🗓 2026-08-20 → 2026-09-28

Core

Lead custom digital circuits team and library development for state-of-the-art ASIC processor design, focusing on high-performance, low-power standard cells and integration with CPU/SOC/GPU teams.

Role type

Senior IC circuit design engineering lead (library development)

Builds

Custom digital circuits, standard cell libraries, and low-power design components for advanced ASICs

Domain

Semiconductor / ASIC Design

Required skills

Standard cell circuit development, low-power design optimization, circuit QA & analysis, foundry collaboration (DRM/DRC/LVS), PDK migration, scripting (Perl/TCL), advanced tech node device behavior, flop/complex standard cell design, power management cell design, circuit robustness analysis

Preferred skills

Leading and mentoring small teams, multi-functional team collaboration, new circuit idea generation, tech node enablement

Technologies

Virtuoso, Perl, TCL

Responsibilities

Drive development of high performance, low power optimized standard cells; Drive development of optimal level shifters and retention designs; Engage with CPU, SOC and GPU teams on chip level integration requirements; Drive Circuit QA checks & analysis; Work with foundries on DRM complaint layout checkers and iPDK requirements; Plan & drive development of new circuits & tech node enablement; Manage migration to new PDK, PDV of standard cells & releases.

Seniority

Senior, hands-on IC with leadership responsibilities

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