SerDes Circuit Design Engineer
Core
Designing high-performance Analog Mixed-Signal (AMS) circuits for high-speed SerDes PHYs to deliver IP for Apple's system-on-chip (SOC).
Role type
Senior IC Analog Mixed-Signal Circuit Design Engineer
Builds
High-speed wireline transceiver IPs for Apple SOC
Domain
Semiconductor / High-speed SerDes / Analog Mixed-Signal
Required skills
Analog mixed-signal circuit design, high-speed serial link experience, transistor-level implementation, behavioral modeling, mask design, FinFet technology, CMOS development, timing closure, SerDes protocols (PCIe, USB, DP, MPHY), lab testing and characterization
Preferred skills
Digitally assisted analog design, Tx/Rx equalization techniques (CTLE, DFE, de-emphasis), CDR architectures, scripting and automation
Technologies
SystemVerilog, Matlab, Python, VerilogAMS, Nanotime, Primetime
Responsibilities
Evaluate circuit topologies for specific product requirements (Rx, CDR, Tx, bias generator, clock generation, analog signal chain, calibration), create block-level specifications, execute transistor-level implementation, drive mask design, interact with cross-functional teams (architecture, SIPI, packaging, board design, DFT, ESD), communicate progress and discuss new ideas
Seniority
Senior, hands-on IC