DDR Design Engineer
Core
Designing high-performance, low-power DDR PHY logic for Apple products, covering concept study, architecture, RTL development, and silicon bring-up.
Role type
Senior IC logic design engineer (DDR PHY)
Builds
DDR PHY designs for high-performance consumer electronics
Domain
Semiconductors / Memory Interface
Required skills
RTL design (Verilog/SystemVerilog), assertion writing, state machine design, timing closure, DFT, logic synthesis, power characterization
Preferred skills
DDR PHY design experience, mixed-signal environment experience
Technologies
Verilog, SystemVerilog, formal tools, static checkers, Unified Power Format
Responsibilities
Perform concept studies for performance, gate count, and power; write design specifications and test plans; provide high-quality RTL with assertions; drive functional and code coverage; support timing closure and silicon bring-up
Seniority
Senior, hands-on IC
