GPU Top Level Physical Design Engineer
Core
Design and manufacture next-generation, high-performance, power-efficient GPUs for Apple devices, implementing complete chip design from netlist to tapeout.
Role type
Senior IC physical design engineer (GPU top-level integration)
Builds
High-performance GPU chips for Apple products
Domain
Semiconductor / GPU architecture
Required skills
ASIC integration, floorplanning, clock and power distribution, global signal planning, I/O planning, P&R flows (Cadence/Synopsys), hierarchical design, IP integration, multi-voltage/clock domain management, large subsystem design (>20M gates), timing and physical convergence, DFM, multi-Vt strategies, thermal management, GPU architecture knowledge
Preferred skills
Top-down design approach, budgeting, mixed signal block integration, global timing verification, physical design verification flows
Technologies
Cadence, Synopsys
Responsibilities
Collaborate with front-end teams to understand RTL and drive physical aspects early; develop PD guidelines, checklists, and methodologies; supervise progress and drive execution; act as focal point for place and route integration; communicate PD needs with cross-functional teams
Seniority
Senior, hands-on IC with team leadership
