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CPU DFT Verification Engineer

Santa Clara, United States of America💼 Full-time🗓 2026-04-24 → 2026-09-28

Core

Verify functionality correctness of DFT logic in CPU designs through testbench development, simulation debugging, and coverage analysis.

Role type

Senior IC verification engineer (CPU DFT)

Builds

Functional CPU chips for consumer electronics

Domain

Semiconductor hardware design (CPU/ASIC)

Required skills

DFT verification, Verilog, Python/Perl/TCL scripting, JTAG/IEEE1500/MBIST/scan methodologies, coverage monitoring, simulation debugging, RTL design collaboration

Preferred skills

CPU architecture knowledge, random constraint verification, waveform debugging tools, lab debug of CPUs/ASIC

Technologies

Verilog, Python, Perl, TCL, JTAG, IEEE1500, MBIST, scan, simulators

Responsibilities

Develop testbenches and tests according to test plans, debug simulation failures, develop coverage monitors, create Verilog checkers or assertions, collaborate with architecture and DFT designers, support silicon bringup efforts

Seniority

Mid-Senior, hands-on IC

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