CPU Performance Architect, Platform Architecture
Core
Defining and optimizing CPU and cache micro-architecture, specifically focusing on the memory subsystem, to enhance performance for next-generation Apple products.
Role type
Senior IC CPU Performance Architect (Memory Subsystem)
Builds
Next-generation iPhone, iPad, Mac, and server CPU designs
Domain
Semiconductor / CPU Architecture
Required skills
CPU and SoC architecture, micro-architecture design, performance simulation, C/C++ programming, scripting (Perl/Python), workload analysis, bottleneck identification
Preferred skills
Memory latency tolerance techniques, prefetching, caching policies, SIMD/vector architectures, MP performance, research-driven environment experience
Technologies
C, C++, Perl, Python, Simulation environments
Responsibilities
Identify performance bottlenecks in CPU and cache micro-architecture, evaluate ideas to address bottlenecks, engage with designers to assess feasibility through modeling, analyze single-threaded and multi-threaded workloads, maintain simulation environment for data-driven decisions
Seniority
Senior, hands-on IC
