Wireless SOC Verification Engineer
Core
Pre-silicon RTL verification of block and top-level Wireless SOCs, integrating IP-level DV environments and crafting reusable UVM testbenches.
Role type
Design Verification Engineer (Wireless SOC)
Builds
Wireless/Bluetooth chips for iPhones and networking devices
Domain
Semiconductor, Wireless protocols, Silicon Design
Required skills
System Verilog, Verilog, UVM, Coverage-driven verification, Multi-chip SOC debug architecture, High-speed layered protocols, Low-power architecture
Preferred skills
Formal Verification, Low Power Verification, ASIC & SOC DV experience, Expertise in SystemVerilog coding
Technologies
UVM, System Verilog, Verilog, PCIe, DDR, USB, PLL, UPF
Responsibilities
Architect UVM-based highly reusable test benches and integrate complex multi-instance VIPs; Create coverage driven verification plans from specifications; Deliver on Power Management designs using low-power methodologies and power up-down scenarios; Work with design, architecture, SW, FW and external IP delivery teams to efficiently integrate and verify overall SOC design; Understand details of High Efficiency SOC Architecture, standard SOC peripherals, and Power Management schemes.
Seniority
Mid-level, hands-on IC
