ASIC Design Engineer — Neural Engine DMA
Core
Design high-performance DMA engines to move model weights and activation tensors between memory and the Apple Neural Engine for on-device AI.
Role type
Senior IC ASIC Design Engineer (DMA Microarchitecture)
Builds
DMA subsystem blocks for Apple Neural Engine integrated into Apple silicon products
Domain
Semiconductor / AI Accelerators / High-Performance Computing
Deliverable
production ML models
Required skills
RTL design (Verilog/SystemVerilog), DMA microarchitecture, SoC front-end design, timing closure, power analysis, area optimization, formal verification, on-chip bus protocols (AMBA AXI/AHB/APB), design automation scripting
Preferred skills
Multi-tapeout experience, complex RTL block implementation, debugging functional failures, micro-architectural specification writing, networking SoC or multimedia IP background
Technologies
Verilog, SystemVerilog, Python, Perl, Tcl, AMBA AXI, AHB, APB
Responsibilities
Own DMA subsystems from microarchitecture specification through tapeout; write parameterized RTL with assertions and cover points; collaborate on architectural trade-offs for performance/power/area; work with verification teams to ensure functional correctness
Seniority
Senior, hands-on IC
