GPU Physical Design Engineer, STA/Timing
Core
Design and manufacture high-performance, power-efficient processors by ensuring timing closure for complex GPU designs.
Role type
Senior IC physical design engineer (STA/Timing)
Builds
Next-generation GPU silicon for Apple products
Domain
Semiconductor / Hardware Design
Required skills
Static Timing Analysis (STA), timing closure, physical design, scripting (TCL, Python, Perl, shell), DFT setup, ECO flows, tapeout signoff checks, EDA tool automation
Preferred skills
EDA tool APIs, cross-talk analysis, OCV, noise analysis, large volume data analysis, multi-functional domain interaction (DFT, synthesis, PD, clocking)
Technologies
TCL, Python, Perl, shell scripting, EDA tools
Responsibilities
Interact with RTL and architecture teams to define physical design constraints; collaborate with Synthesis and Physical Design teams for power/performance/timing optimization; set up DFT modes and ensure test features are properly timed; assemble top-level design for STA and review logs/reports; create and maintain automation scripts for high-quality STA reports; run ECO flows to achieve timing closure; drive tapeout activities and execute signoff checks; work with CAD vendors to improve analysis flows.
Seniority
Senior, hands-on IC
