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Physical Design Engineer

Beaverton, United States of America💼 Full-time🗓 2026-07-23 → 2026-09-28

Core

Physical Design Engineer responsible for high-performance PHY design from RTL to GDSII delivery, collaborating with architecture, CAD, timing, and logic teams.

Role type

Senior IC Physical Design Engineer (PHY/SOC)

Builds

High-performance PHY and SOC chips

Domain

Semiconductor / Hardware Design

Required skills

Static timing constraints, floor-planning, power grid design, place and route, ECO generation, LVS/DRC verification, SoC architecture, Verilog, Perl/Tcl scripting, STA methodology

Preferred skills

High PHY/SOC design experience, physically aware synthesis, clock network guidelines, physical verification debugging, CAD methodology development

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