CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Core
Design high-performance, low-power CPU front-end and out-of-order subsystems for Apple Silicon products.
Role type
Senior IC CPU Microarchitect/RTL Engineer
Builds
Apple Silicon microprocessors (iPhone, iPad, Mac, Vision Pro)
Domain
Semiconductor / CPU Microarchitecture
Required skills
Micro-architecture development, RTL design (Verilog/VHDL), functional verification, performance exploration, timing/power/area optimization, C/C++ programming, scripting (Perl/Python)
Preferred skills
Out-of-order execution, instruction scheduling, integer/floating point execution, cache/memory subsystems, low-power techniques, high-performance trade-offs
Technologies
Verilog, VHDL, C, C++, Perl, Python
Responsibilities
Develop micro-architecture specifications, own RTL design for PPA/T goals, support verification via test benches and formal methods, explore performance strategies, implement physical design aspects
Seniority
Senior, hands-on IC
