Physical Design Engineer
Core
Design high-speed clock distribution circuits and manage clock architecture for graphics projects from start to end.
Role type
Physical Design Engineer (Clock Implementation)
Builds
High-performance graphics chips
Domain
Semiconductor / Physical Design
Required skills
High-speed clock distribution network design, Multi-clock domain synchronization, Clock planning and tree optimization, Clock repeater and buffer configuration, Metal layer and fanout strategy tuning, Physical design verification (DRC/LVS) debugging
Preferred skills
N/A
Technologies
Spice, Excel
Responsibilities
Design clock architecture and high-speed distribution circuits; Perform clock planning considering power domains and routing constraints; Build simulation models and conduct clock repeater studies; Define custom clock cell families; Optimize clock trees for latency and skew; Debug PDV issues during clock construction.
Seniority
Entry-level (1 year experience required)
