PMU Design Verification Intern
Core
Intern role focused on creating verification plans, developing stimulus, and implementing components of the verification environment for Apple Power Management Unit (PMU) silicon.
Role type
Design Verification Intern (ASIC/SoC)
Builds
High-performance PMU silicon for Apple SoCs (iPhone, iPad, Mac, Apple Watch, Apple TV)
Domain
Semiconductor / Hardware Design Verification
Required skills
RTL design (Verilog/VHDL), SystemVerilog, UVM, OOP basics, HDLs/HVLs, simulation with synthesized netlist, debugging test-bench code, verification strategy definition
Preferred skills
Finite state machine knowledge, CPU bus architectures, mixed signal design/verification, TCL/Perl/Python scripting
Responsibilities
Create verification plans and define completeness metrics, Implement verification environment components, Run simulations and debug issues, Collaborate with architecture and design teams to identify critical cases
Seniority
Intern
