Wireless PHY Design Verification Engineer
Core
Verify sophisticated WiFi PHY digital systems including time/frequency-domain processing, hardware acceleration, and protocol implementation for Apple's wireless silicon.
Role type
Senior IC design verification engineer (wireless PHY)
Builds
Multi-gigabit wireless SoCs for Apple products
Domain
Consumer electronics / Wireless communications
Required skills
SystemVerilog, UVM, constrained random testing, functional coverage, assertion-based verification, DSP subsystem verification, ASIC verification flows, testbench architecture, simulation debugging
Preferred skills
IEEE 802.11 protocols, Bluetooth, Cellular, DPI integration, DSP algorithm verification, transaction-level modeling, scoreboarding
Technologies
SystemVerilog, UVM, IEEE 802.11, DPI
Responsibilities
Develop UVM environments and bus functional models for DSP subsystems and IEEE 802.11 protocol; Own subsystem verification from test planning through coverage closure; Architect and implement constrained random scenarios; Apply data-driven verification closure through coverage tracking and metrics; Drive verification strategy with cross-functional teams
Seniority
Senior, hands-on IC
