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Custom Library Design Lead

San Diego, United States of America💼 Full-time🗓 2026-09-23 → 2026-09-28

Core

Lead custom digital circuits team and library development for state-of-the-art ASIC processor design, delivering high-performance, low-power standard cells and power management cells to millions of customers.

Role type

Senior IC circuit design engineering lead (library design)

Builds

High-performance, low-power standard cells and power management cells for advanced ASICs

Domain

Semiconductor / ASIC design / Custom library development

Required skills

Standard cell library development, PPA optimization, power management cell design, foundry PDK migration, DRC/LVS flows, Virtuoso, layout-dependent design optimization, team leadership, multi-functional collaboration

Preferred skills

Master's degree, agentic flows, AI-driven design optimization, complex standard cell design, flop design

Technologies

Virtuoso, DRC/LVS, PDK, PDV

Responsibilities

Lead and mentor a small team of circuit design engineers; Drive design, development, and characterization/QA of high-performance, low-power standard cells; Drive development of power management cell designs for low-power product requirements; Engage with CPU, SOC, and GPU teams on chip-level integration requirements; Develop new methodologies for library checks and analysis; Manage migration to new PDK and release of standard cells.

Seniority

Senior, hands-on IC with strategic team leadership

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