Formal Verification Engineer
Core
Architecting and leading formal verification efforts for System-on-a-chip (SoC) design blocks and IP to prove properties, find bugs, and improve micro-architectures.
Role type
Senior IC formal verification architect
Builds
High-quality functional SoC designs and IP blocks for Apple hardware products
Domain
Semiconductor hardware design and verification
Required skills
SoC/CPU/GPU/Cellular design knowledge, VLSI and digital logic design, formal property proofing, pipeline architecture understanding, memory/DMA controller expertise, temporal logic assertion languages (SVA/PSL), EDA formal tool usage, scripting languages
Preferred skills
Tool development experience, debugging complex hardware specifications
Technologies
SVA, PSL, EDA formal tools
Responsibilities
Develop formal micro-architecture specifications, create comprehensive formal verification test plans, prove design properties and identify bugs, craft novel verification solutions for complex architectures, develop reusable formal models and verification code bases
Seniority
Senior, hands-on IC
