Senior ASIC Design Verification Engineer
Core
Own and execute digital SoC verification for advanced communication semiconductors supporting software-defined vehicles, robotics, and intelligent machines.
Role type
Senior IC ASIC Design Verification Engineer
Builds
Robust, reusable, and highly automated verification environments for complex automotive communication semiconductor designs
Domain
Semiconductor / Automotive Communications / Digital SoC
Required skills
ASIC verification fundamentals, SystemVerilog, UVM, Python/TCL scripting, gate-level simulation, coverage analysis, debugging complex simulation failures, modular testbench architecture design
Preferred skills
Networking protocols (Ethernet MAC/PHY, PCIe, TCP/IP), video standards/processing, digital signal-processing filters, third-party IP (SerDes, controllers), SystemC/DPI, automated testbench generation
Technologies
Verilog, SystemVerilog, UVM, Python, TCL, C, C++, EDA tools, gate-level simulation, coverage analysis tools
Responsibilities
Develop and maintain verification environments using industry-standard methodologies; Create, execute, and automate functional tests and regression workflows; Analyze simulation results, debug failures, and identify root causes; Develop coverage strategies to identify verification gaps; Collaborate with architects, designers, and software engineers on verification plans; Contribute to reusable pre-silicon and post-silicon test infrastructure
Seniority
Senior, hands-on IC
