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Ingénieur(e) Vérification SoC F/H

Vallauris-Antibes-Ouest, Grasse💼 Full-time🗓 2026-09-24 → 2026-09-25

Core

Perform block/top-level verification of complex SoCs for future autonomous and connected automotive systems.

Role type

SoC verification engineer

Builds

Verified SoC blocks and top-level designs for automotive autonomous systems

Domain

Automotive electronics, SoC design

Required skills

RTL design languages (Verilog, VHDL), SystemVerilog, UVM methodology, test plan creation, testcase implementation, debugging

Technologies

UVM, SystemVerilog, Verilog, VHDL

Responsibilities

Analyze architecture, write block verification plans, write test plans, implement and execute testcases, debug and report to designers

Seniority

Mid-level IC engineer

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