ASIC验证工程师（网络方向）-Data
Core
Design and execute module-level or system-level verification for chip/FPGA network components, ensuring quality through verification planning, environment setup, and coverage analysis.
Role type
Senior IC ASIC verification engineer (network)
Builds
Network chips (NICs, switches) and FPGA modules
Domain
Semiconductor hardware / Network protocols
Required skills
SystemVerilog, UVM methodology, EDA tools, C/C++/SystemC, Python/Makefile scripting, network packet processing algorithms, microcode processing
Preferred skills
Network performance simulation modeling, hardware-software co-simulation, NIC/switch chip verification experience
Responsibilities
Develop verification plans and execute module/system-level verification; Design test points and cases, build reusable environments, execute tests, and analyze defects; Maintain environments, perform regression testing, and achieve coverage convergence; Assist design teams with debugging and performance analysis; Integrate verification environments for system-level validation
Seniority
Mid-to-Senior, hands-on IC
