ASIC验证工程师（RDMA方向）
Core
Design and execute module-level or system-level verification plans for chips, focusing on RDMA protocols.
Role type
Senior IC ASIC verification engineer (RDMA)
Builds
Production-ready chip modules and systems
Domain
Semiconductor hardware / Network protocols
Required skills
UVM methodology, SystemVerilog, C/C++/SystemC, Python scripting, EDA tools, coverage analysis, test case design, regression testing
Preferred skills
RDMA kernel/user-space drivers, large-scale network simulation, congestion control, collective communication software
Technologies
UVM, SystemVerilog, C, C++, SystemC, Python, EDA tools
Responsibilities
Develop verification environments, execute test cases, analyze defects, collect coverage data, assist in debugging and performance analysis
Seniority
Mid-Senior, hands-on IC
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