SoC系统软件架构师/工程师-高速接口
Core
Design and optimize system software architecture for ByteDance's self-developed SoC chips, focusing on high-speed interface debugging and silicon-to-product validation.
Role type
Senior SoC System Software Architect (High-Speed Interfaces)
Builds
Self-developed SoC chips for ByteDance data centers
Domain
Semiconductor / High-Speed Interconnects
Deliverable
production ML models
Required skills
SerDes/UCIe interface debugging, PCIe/CXL/High-speed Ethernet protocol expertise, Arm/RISC-V SoC architecture, On-chip bus protocols (AXI/CHI), FlexNOC/CMN IP debugging
Preferred skills
GPGPU/NPU hardware architecture, Large model inference/training workflows, CUDA/ROCm software stack, Chiplet/Multi-card interconnect engineering
Technologies
UCIe, SerDes, PCIe, CXL, AXI, CHI, FlexNOC, CMN, CUDA, ROCm
Responsibilities
Design and optimize system software architecture for self-developed SoC chips; Develop and debug BSP/drivers; Perform hardware-software co-validation on pre-silicon platforms and post-silicon productization; Analyze industry trends to provide input for chip-software co-design.
Seniority
Senior, hands-on IC
