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Senior / Lead Physical Design Engineer

Hyderabad, TS, in💼 Full-time🗓 2026-08-04 → 2026-09-30

Core

Lead backend implementation, signoff quality, and methodology development for ASIC programs from RTL handoff through tapeout.

Role type

Senior/Lead Physical Design Engineer (ASIC)

Builds

ASIC chips for AI-powered digital infrastructure and Trusted Control/Compute Units (TCU)

Domain

Semiconductor / ASIC Physical Design

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