Design Verification Intern
Core
Develop and verify digital sections of leading-edge memory data buffer chips (DDR5, DDR6+) for datacenter AI and cloud computing applications.
Role type
Design Verification Intern
Builds
Memory interface products for datacenters
Domain
Semiconductor / Memory Interfaces
Required skills
System Verilog, UVM methodology, Verilog, testbench development, coverage analysis, functional verification, performance optimization
Preferred skills
MSEE degree, advanced knowledge of DDR protocols
Technologies
UVM, System Verilog, Verilog, DDR5, DDR6
Responsibilities
Develop reusable verification environments and testbench structures, define verification strategies and test plans, execute tests and monitor coverage, collaborate with design teams to ensure testability, identify process improvements.
Seniority
Intern
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