Sr Engineer Design
Core
Design and verify custom System-on-Chip (SoC) designs, focusing on all aspects of Design-for-Test (DFT) including ATPG, MBIST, LBIST, and analog test solutions.
Role type
Senior SoC DFT Engineer
Builds
Custom SoC designs with integrated DFT architectures
Domain
Semiconductor manufacturing / Digital design / Test engineering
Required skills
ATPG, MBIST, LBIST, analog test solutions, digital design fundamentals, Verilog, SystemVerilog, scripting (Python, Tcl, Perl), test pattern generation, RTL integration, physical design collaboration, silicon bring-up analysis, root-cause debugging, DFT automation
Preferred skills
Git/version control, simulation log/waveform debugging, UNIX EDA environment
Technologies
Verilog, SystemVerilog, Python, Tcl, Perl, EDA tools
Responsibilities
Implement DFT architectures (ATPG, MBIST, LBIST, scan insertion, analog test), execute test pattern generation and optimization, apply standardized DFT methodologies, integrate DFT requirements into RTL and physical design, develop automation scripts for test pattern creation, analyze test data from silicon bring-up and production, document DFT implementations and test results
Seniority
Senior, hands-on IC
