ASIC Design Engineer - New College Grad 2027
Core
Implement high-performance, area, and power-efficient RTL for NVIDIA's leading SoCs and GPUs, focusing on micro-architecture and digital systems.
Role type
ASIC Design Engineer (New College Grad)
Builds
GPU work schedulers, time distribution systems, interrupt controllers, DMA engines, and interconnect networks for consumer graphics and AI products.
Domain
Semiconductor / Hardware Design / AI Computing
Deliverable
production ML models
Required skills
RTL development (Verilog), ASIC design flow, micro-architecture, Digital systems, VLSI design, Computer Architecture, Computer Arithmetic
Preferred skills
C/C++, Python, Perl, debugging, arbiters, scheduling, synchronization, bus protocols, interconnect networks, caches
Technologies
Verilog, RTL, ASIC, GPU, SoC
Responsibilities
Implement and document RTL to meet design targets; analyze architectural trade-offs; craft and verify micro-architecture; collaborate with architects and verification teams; work on specific IPs; architect features for silicon debug and validation.
Seniority
Entry-level (New College Grad)
