ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)
Core
Design and verification of high-performance ASICs and FPGAs for critical aerospace systems, including laser gimbal control, satellite phased arrays, and flight computers.
Role type
Senior/Lead/Principal ASIC/FPGA Design and Verification Engineer
Builds
Custom SoCs, high-integrity flight computers, and laser gimbal control systems for Space, Launch, and Avionics programs.
Domain
Aerospace & Defense, Digital IC Design
Required skills
ASIC/FPGA architectural definition, SystemVerilog, hardware-based integration and test, static timing analysis, LEC, CDC, linting, UVM, Functional Coverage Models, Object Oriented Programming, hardware emulators (Palladium), high-speed Serdes interfaces (JESD204C, PCIe, Ethernet), scripting (Python, Perl), Linux environments.
Preferred skills
Leading design/verification teams, radiation mitigation techniques, 1st pass success with ASIC designs.
Technologies
SystemVerilog, UVM, Palladium, JESD204C, PCIe, Ethernet, Linux, Git/SVN/CVS, Python, Perl, Make.
Responsibilities
Lead FPGA/ASIC designs and manage team execution; define/refine system requirements and architect digital logic; implement designs from block-level micro-architecture to gate-level netlists; perform static timing analysis, LEC, CDC, and linting; create self-checking test benches and Functional Coverage Models; validate designs through hardware integration tests; mentor less senior engineers.
Seniority
Senior, hands-on IC with mentorship responsibilities
