AI ASIC Memory Compiler Engineer
Core
Develop behavioral, FPGA, timing, and DFT simulation models and debug/optimize SRAM models for ASIC design flow to deliver high performance, low power, and small area in-house memory design kits and flows.
Role type
IC memory compiler engineer (ASIC)
Builds
In-house memory design kits and design flows for advanced technology nodes
Domain
Semiconductor / ASIC / Memory Design Automation
Required skills
SRAM modeling, behavioral modeling, FPGA simulation, timing analysis, DFT simulation, ASIC design flow optimization, debugging, automation flow development
Preferred skills
null
Technologies
null
Responsibilities
Develop simulation models for memory design, debug and optimize SRAM models, contribute to memory compiler automation flow development
Seniority
null
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